Verification
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FV Interview Questions (II) – How to Do FSM Checks?
Jasper Gold offers “fsm_checks” command to auto-generate properties for FSM state / transition reachability. When running this command, the tool automatically detects FSM state variables or accepts user-specified FSM state variables, and extracts cover properties to prove. To define a conceptual FSM from the the…
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FV Interview Questions (I) – How to Debug Unreachable Properties?
During formal verification, sometimes we may see unreachable properties. Using Cadence Jasper Gold for example, it can be flagged as either unreachable cover properties, or passing yet never triggered assert properties. This can be caused by over constraints, i.e., excessive assume properties, or design bugs.…
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Learning UVM: 2 Free Online Resources
UVM (Universal Verification Methodology) is the most popular verification framework used in the ASIC / SOC industry. Unfortunately, there are not a whole lot of resources for people to study UVM themselves, and many schools do not teach UVM in classrooms. We found 2 free…
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3 EDA Playgrounds: Free Online RTL Simulators & Waveform Editor
Traditional commercial EDA tools usually cost tens of thousands annually, and it introduces high bars for people who want to enter the hardware industry. Unlike the software industry, there are not a whole lot of open-source hardware tools for people to try out freely. Luckily,…
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Our books are available on Kindle Unlimited for free. Plus, you get unlimited access to hundreds of other books for preparing hardware interviews, including our recommended reading list
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