Micro-Architecture
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How to avoid unintended fixed priority arbiter usage in RTL?
We discussed how to optimize PPA in RTL coding, and we will cover how to avoid unintended fixed priority arbiters in RTL. Fixed priority arbiters are “expensive” in RTL implementation. The more requests the arbiter has, the more level of logic the final grant will…
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How to implement hardware for a 3-number sorter?
If sorting of 3 numbers must complete in 1 cycle, then the optimal solution is to use 3 comparators. The diagram below shows the implementation: This design can easily be pipelined, if timing becomes an issue. If it is not required to get the array…
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Hash Function and Its Applications: Hash CAM & Bloom Filter
A hash function defines the mapping relationship of (key, value) pairs. Good hash functions should be very fast to compute (easy for hardware implementation), and should minimize duplication of output values (less collisions). How to Implement a Hash Function? One common approach to implement a…
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Best Practice for RTL Naming Conventions
In this post, we share a few RTL naming conventions for better readability. See the table below. RTL Naming Convention RTL Naming Convention Use intelligible signal / variable names Better readability is achieved if the RTL code is “self-documented” Use “<name>_clk” for the name of…
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Best RTL Coding Practice for Better PPA
Many times, different RTL coding styles in the same piece of code result in different PPA (Power, Performance, Area). Let us dive into a few examples. Use Register Enable Conditions When coding data pipelines, it is a good practice to always explicitly include an enable…
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RTL Implementation of Integer Division by Constants
In our 1st book in “Crack the Hardware Interview”, we discussed how to implement arbitrary integer division in RTL, and such division takes several clock cycles to complete and is costly in physical implementation. It is also quite common to implement integer division by constant…
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LFSR (Linear Feedback Shift Register): Randomize in Digital World
In digital design, we quite often need to generate random numbers. However, it is impossible to achieve true randomness in the digital world. Therefore, design engineers use LFSR (Linear Feedback Shift Register) to generate pseudo-random sequences. Why Randomness is Needed in Digital Design? Randomness is…
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Signal Manipulation in RTL: Edge Detection, Pulse & Level Signal Conversions
How to detect signal edges, as well as how to convert between pulse and level signals, are frequently asked in ASIC / RTL design interviews. We intend to cover these RTL signal manipulation techniques in this post. Rising Edge Detection RTL implementation of rising edge…
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RTL Implementations of 3 Must Know Encoding Techniques
There are quite a few encoding techniques used in modern ASIC design. In this post, we will cover RTL implementations of 3 must know encoding techniques. Binary / 1-Hot Encoding To implement binary to 1-hot encoding, using 3-bit binary number for example: It is a…
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Design a sync FIFO using single-port SRAMs
In our 1st book in series “Crack the Hardware Interview”, we discussed how to design a sync FIFO using a dual-port SRAM. Assuming the same size of storage, single-port SRAMs typically come with a smaller area than dual-port SRAMs. Therefore, using single-port SRAMs as sync…
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