It is not uncommon to find RTL bugs after RTL freeze. Typically after RTL freeze, DV and FV team will continue running regressions, and a corner-case RTL bug might be uncovered at this point.
The first step would be figuring out the exact reproducing recipe, and summarizing what conditions or scenarios would sensitize the bug.
The second step would be analyzing if the bug is a must-fix. For example, certain RTL bugs can have software workarounds, and the bugs will no longer be triggered. It is also possible the bug only leads to recoverable errors or non-catastrophic failures. In such cases, the bug may not be a must-fix.
If the bug is deemed must-fix, then design engineers have to do a functional ECO, to avoid a full synthesis re-spin. RTL design, implementation and physical design teams must all be involved to implement the ECO.
The last and the most important step would be learning from mistakes. Design engineers and verification engineers have to work together to enhance and improve the verification plan.
Chipress 
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