Unpacked Arrays in SystemVerilog Testbench

There are 4 types of unpacked arrays commonly used in SystemVerilog testbench:

Fixed-size Arrays
Dynamic Arrays
Queues
Associated Arrays

The following shows how to instantiate these unpacked arrays

// Fixed-size arrays
// type array_name[size], for example:
int numbers[5]; // array of 5 integers, with index from 0 to 4
byte byteArr[3]; // array of 3 bytes


// Dynamic arrays
// type array_name[], for example:
logic[7:0] mem[][]; // 2-dimension dynamic array
mem = new[4]; // allocate first dimension
foreach (mem[i])
    mem[i] = new [i*2]; // allocate second dimension


// Queues
// type array_name[$[:bound]], for example:
integer queue[$];
// can use following built-in functions to form a FIFO or stack
// push_back(), push_front(), pop_back(), pop_front(), etc.


// Associated arrays
// type array_name[index_type], for example:
byte opcode[string]; // indexed by string
opcode[“MINUS”] = 7; // create index “MINUS” memory

The table below shows a comparison across all array types above, especially in terms of performance:

Type	Memory	Index	Application & Performance
Fixed Size	Allocated at compile-time; unchangeable afterwards	Numerical	Gives the best performance; Use when array size is known and fixed before simulation
Dynamic	Allocated at run-time; changeable at run-time	Numerical	Gives good performance; Use when you need random read / write access to any element of the variable sized array
Queue	Push-Pop at run-time to change size	Numerical	Gives good performance; Use for stack, CAM applications, or Scoreboard queues
Associative	Write at run-time to allocate memory	Typed	Gives moderate performance; Useful for sparse memory applications; Use when creating hash tables

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Unpacked Arrays in SystemVerilog Testbench

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