Chipress

In the ASIC design industry, there are certain configuration register definition guidelines that RTL designers should follow. This is to achieve the following purposes:

1. Allowing software / firmware / verification teams to migrate code to new projects faster
2. Improving maintainability and scalability of software / firmware code base

Guidelines for Configuration Register Content

1. Do not mix control and status bits in the same configuration register
2. Never split the same field into non-contiguous bits or different configuration registers, otherwise it may cause register access atomicity issue
3. All configuration registers must be readable
4. Make sure no side-effect from configuration register reads (Reading a configuration register should not change its value)

Guidelines for Configuration Register Address Map

1. Do not arbitrarily change addresses and names of the same configuration registers as consistency and stability do matter
2. Configuration register arrays must be contiguous in address space
3. When retiring an obsolete configuration register, leave the address unused and mark it reserved; do not insert a new configuration register at that address
4. For each individual block, add a spare register that is both readable and writable. It can be useful during ECO process
5. Think about future extension and make room for future configuration registers