Chipress

Modern SoC equips with varieties of hardware accelerators for different types of workloads, for example:

1. Direct Memory Access, or DMA. It is a dedicated piece of hardware to move data between system memory and peripheral devices, or between peripheral devices, or even between two system memory locations
2. Video encoders and decoders, that compress or decompress images or video streams
3. Display image processor, that processes the images for the device panel

The heart of an SoC is the CPU, and it is where the Operating System (OS) is running.

A driver is the software that tells the OS how to communicate with a hardware accelerator in the SoC, and the OS may call the driver to assign a specific task to the hardware accelerator.

Firmware is the software that runs on the hardware accelerator. It is the firmware that interacts with the hardware accelerator directly, and it needs to understand the API provided by the accelerator.

There are at least 2 aspects associated with the software API, i.e., how to start the work and how to detect job completion.

How to Start the Work

Software may prepare a list of descriptors in the system memory, ask the hardware to fetch the descriptors and start the work. The descriptors define the specific task that hardware needs to do. 

For example, DMA descriptors can specify the start memory address, amount of data to transfer, and the location of the next descriptor (linked list descriptor structure). Sometimes, the descriptors are stored in a circular buffer, or ring descriptor structure.

If workload latency is a concern, it is also possible that descriptors are stored in a local RAM, and descriptors are double buffered. When hardware is using one set of descriptors, the software can update the other set of descriptor in advance.

Hardware accelerators can operate under different modes, and they define a set of registers for software to configure.

For example, video encoder and decoder software must tell hardware which codec standard and coding tools to use before starting the job, by configuring the corresponding registers. Display software must tell the hardware what panel the SoC is using, thus it can perform specific pixel processing that is suitable for that panel type.

How to Detect Job Completion

Typically, once a hardware accelerator completes a job, it raises an interrupt to firmware, and firmware decides the next step.

Another solution is that firmware periodically polls the hardware status, and see if the job is done. This solution is relatively slow, and it is used in less performance critical applications.

Conclusion

Software API of hardware accelerators is a complex and deep topic, and we only covered a tip of an iceberg. Understanding the software API is critical for RTL designers, as SW & HW co-design is important for the overall SoC success. Proper definition of software API impacts system performance as well as efficiency.

One recommended reading in this field is “Hardware/Firmware Interface Design: Best Practices for Improving Embedded Systems Development” written by Gary Stringham.

In addition, a good SW & HW co-design should also take debug visibilities into account. We covered this topic in our book “Crack the Hardware Interview: Physical Design & Silicon Debug”.