How to detect signal edges, as well as how to convert between pulse and level signals, are frequently asked in ASIC / RTL design interviews. We intend to cover these RTL signal manipulation techniques in this post.
Rising Edge Detection
RTL implementation of rising edge detection is shown below:
input in;
output posedge_detected;
logic in_q;
always_ff @(posedge clk)
if (~reset_n) in_q <= ‘0; // assuming default value of “in” is 0
else in_q <= in;
assign posedge_detected = in & ~in_q;
Falling Edge Detection
RTL implementation of falling edge detection in shown below:
input in;
output negedge_detected;
logic in_q;
always_ff @(posedge clk)
if (~reset_n) in_q <= ‘0; // assuming default value of “in” is 0
else in_q <= in;
assign negedge_detected = ~in & in_q;
Signal Toggle Detection
RTL implementation of signal toggle detection, i.e., both rising and falling edge, is shown below:
input in;
output toggle_detected;
logic in_q;
always_ff @(posedge clk)
if (~reset_n) in_q <= ‘0; // assuming default value of “in” is 0
else in_q <= in;
assign toggle_detected = in ^ in_q;
Convert Signal Toggle to Pulse
It is easy to see that, all above 3 RTL implementations of edge / toggle detection, can also be used to convert signal toggle to pulse.
Convert Pulse to Signal Toggle
RTL implementation of converting pulse to signal toggling is shown below:
input in;
output logic out;
always_ff @(posedge clk)
if (~reset_n) out <= ‘0;
else out <= out ^ in;
Converting pulse to signal toggle is one useful technique to robustly transfer pulses from one clock domain to the other.
Chipress 
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