Chipress

Our 3rd book in “Crack the Hardware Interview” series focuses on physical design and silicon debug questions frequently asked during RTL design interviews. We hope you find the information in this book useful in preparing digital design / verification interviews.

To provide a preview of the book, the Table of Contents is shown below:

Part 1 Physical Design

Chapter 1 Static Timing Analysis (STA)

• Q1: What is metastability?
• Q2: What does STA do? What does being “synchronous” mean?
• Q3: What are setup time and hold time?
• Q4: What are setup time and hold time constraints?
• Q5: What is the benefit of using half-cycle-path?
• Q6: What are the sources for clock uncertainty?
• Q7: How does STA check reset removal & recovery / clock gating cell / data to data timing?
• Q8: How does STA verify async FIFO functionality?
• Q9: How does STA check latch based design?
• Q10. How does multi-cycle-path (MCP) work in STA?

Chapter 2 Design Constraints (SDC)

• Q11: What are design / library objects? How to access & manipulate these objects?
• Q12: How to set single-clock design constraints in Post-CTS run?
• Q13: How to set I/O constraints for single-clock design in Post-CTS run?
• Q14: How to set multi-synchronous-clock design constraints?
• Q15: How to set generated clock design constraints in Post-CTS run?
• Q16: How to set mutually exclusive synchronous clock design constraints?
• Q17: How to set asynchronous clock design constraints?
• Q18: How to verify SDC?

Chapter 3 STA Tool / PrimeTime

• Q19: What is PrimeTime flow? Can you write a simple PrimeTime STA script?
• Q20: What to check before running PrimeTime?
• Q21: What are graph based analysis (GBA) and path based analysis (PBA)?
• Q22: What are OCV / AOCV / POCV?
• Q23: How to calculate timing slack using OCV?
• Q24: What is CRPR in PrimeTime timing reports?

Chapter 4 Timing ECOs

• Q25: What is the procedure for timing ECOs?
• Q26: How to fix setup time and hold time violations?
• Q27: What are timing ECO tools?

Part 2 Silicon Debug

• Q1: What are common Design for Debug (DFD) techniques?
• Q2: How to implement checksum?
• Q3: How to implement Cyclic Redundancy Check (CRC)?
• Q4: How to identify which bit of the 32b register has stuck-at fault?

Part 3 Behavioral Questions & Useful Interview Tips

• Q1: What verbs to use in your resume to stand out?
• Q2: Interview etiquette and best interview practices
• Q3: How to answer “Any Questions for Me” at the end of an interview?
• Q4: What to write in a “Thank You Letter”?
• Q5: Why and how should you follow up with your job application?