Computer Architecture: A quantitative Approach
John L. Hennessy and David A. Patterson’s book Computer Architecture: A Quantitative Approach is a must read for computer architecture study.
In particular, we recommend interviewees to focus on the following sections of the book:
- Appendix B, Review of Memory Hierarchy
- Appendix C, Pipelining: Basic and intermediate Concepts
- Chapter 3, Instruction-Level Parallelism and Its Exploitation
- Chapter 5, Thread-Level Parallelism
The above sections provide a comprehensive review of CPU pipeline, CPU out-of-order scheduling, virtual memory, cache, and cache coherency.
We understand that, when it comes to interview preparation, candidates often do not have enough time to go through the above chapters thoroughly. Therefore, our book Crack the Hardware Interview – from RTL Designers’ Perspective: Architecture and Micro-architecture Design comes in handy.
A Primer on Memory Consistency and Cache Coherence
Vijay Nagarajan, Daniel J. Sorin, Mark D. Hill, David A. Wood’s book A Primer on Memory Consistency and Cache Coherence is a must read for cache coherence implementation.
The book starts from the necessity of having cache coherency in hardware: support memory consistency models in multi-threaded programming. It then explains the various implications of implementing cache coherency in hardware, which are rarely covered by textbooks.
For interviewees who want to study cache coherency and its hardware implementation, this book is definitely a must read.
Digital Integrated Circuits: A Design Perspective
Jan M. Rabaey, Anantha Chandrakasan and Borivoje Nikolic’s book Digital Integrated Circuits: A Design Perspective is a must read of digital circuit design and some low-level implementation details.
In particular, we recommend interviewees to focus on the following sections of the book:
- Chapter 5, The CMOS Inverter
- Chapter 6, Designing Combinational Logic Gates in CMOS
- Chapter 7, Designing Sequential Logic Circuits
- Section 10.3, Synchronous Design – An In-Depth Perspective
- Section 11.1 – 11.6, various arithmetic building block design
The above sections provide a detailed illustration of basic CMOS circuit implementation, basic CMOS circuit building blocks, and timing constraints for digital circuit designs.
SystemVerilog for Design: A Guide to Using SystemVerilog for Hardware Design and Modeling
Stuart Sutherland, Simon Davidmann and Peter Flake’s book SystemVerilog for Design: A Guide to using SystemVerilog for Hardware Design and Modeling, is a great handbook for design engineers using SystemVerilog for RTL design. It covers various powerful SystemVerilog features as well as syntax differences from Verilog.
Another good resource of using SystemVerilog for design, is its Language Reference Manual. Though this is more for seasoned SystemVerilog users.
Advanced Chip Design: Practical Examples in Verilog
Kishore Mishra’s book Advanced Chip Design: Practical Examples in Verilog provides great examples of basic design building implementations using Verilog. We definitely recommend interviewees to read its Chapter 5, 6, 7 and 8.
When it comes to interview preparation, candidates often do not have enough time to go through the above chapters thoroughly. Therefore, our book Crack the Hardware Interview – from RTL Designers’ Perspective: Architecture and Micro-architecture Design can help.
SystemVerilog for Verification: A Guide to Learning the Testbench Language Features
Chris Spear and Greg Tumbush’s book SystemVerilog for Verification: A Guide to Learning the Testbench Language Features teaches all verification features of the SystemVerilog language.
For RTL design interviews, we do not have to go through every single piece of detail. We just need to understand the basic UVM testbench architecture and some other testbench aspects related to RTL design and DV constraint review, for example:
- Chapter 6, Randomization
- Chapter 9, Functional Coverage
Another good resource for understanding the basic UVM testbench architecture is UVM Cookbook from Mentor Graphics. Although this is not the primary focus for RTL design interviews.
We published Crack the Hardware Interview – from RTL Designers’ Perspective: Verification, Implementation, Synthesis & Power to cover common RTL design interview questions related to design verification. You may find them useful.
Formal Verification: An Essential Toolkit for Modern VLSI Design
Erik Seligman, Tom Schubert and M. V. Achutha Kiran Kumar’s book Formal Verification: An Essential Toolkit for Modern VLSI Design presents practical approaches for design and validation. It also provides various hands-on advice to help working engineers integrate these techniques into their work.
Especially, we recommend RTL designers to focus on the following chapters of the book:
- Chapter 3, Introduction to SystemVerilog Assertions
- Chapter 4, Formal Property Verification
- Chapter 6, Effective FPV for Verification
- Chapter 8, Formal Equivalence Verification
- Chapter 10, Dealing with Complexity
In the aspect of formal verification in preparing RTL design interviews, our book Crack the Hardware Interview – from RTL Designers’ Perspective: Verification, Implementation, Synthesis & Power could help. We cover common RTL design interview questions related to format verification in our book.
VLSI Test Principles and Architectures: Design for Testability
Laung-Terng Wang, Cheng-Wen Wu and Xiaoqing Wen’s book VLSI Test Principles and Architectures: Design for Testability is a comprehensive guide to DFT methodologies used in modern SoC design. It is a must read for implementation engineers or integration engineers who need to have a deep understanding of DFT methodologies.
In particular, we recommend interviewees to focus on the following chapters of the book:
- Chapter 2, Design for Testability
- Chapter 3, Logic and Fault Simulation
- Chapter 4, Test Generation
- Chapter 5, Logic Built-In Self-Test
We also have a couple of blog posts targeting DFT interview questions:
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